On-chip resistor devices, such as thin film metallic resistors, are utilized in semiconductor integrated circuits for various applications. Thin film metallic resistors are typically formed within BEOL (back of line) interconnect structures by depositing metal films and using damascene or subtractive etch techniques. There are various technical issues, however, associated with thin film metallic resistors. For example, a process flow to fabricate integrated thin film metallic resistors as part of a BEOL interconnect structure can be complicated and expensive because the fabrication of integrated thin film metallic resistors can require multiple deposition and lithographic masking steps. Moreover, the embedded layers of materials that are used to fabricate the thin film metallic resistors elements may cause topography issues that degrade a final chip yield. Furthermore, thin film metallic resistors have a limited scaling capability based on the dimension limitations. For example, in high-density integrated circuitry, the footprint area (width times length) occupied by a two-dimensional thin film metallic resistor structure should be minimized, which in turn, places a limit on the magnitude of the resistance that can be achieved with a two-dimensional thin film metallic resistor structure.